P-Type Silicon Nanowire Transistor Modeling

The presented model based on the quantum confinement and high electric filed effect illustrates velocity approach to the modeling of a P-type silicon nanowire transistor. It has been clarified that the intrinsic velocity of nanowire and other hetero-structure field-effect transistors (FETs) is governed by the transit time of holes (electrons). The length of the channel for ballistic channel is equal to mean free path. However, it does not affect the velocity saturation in high electric field that is always ballistic. In high electric field, the carriers are in a coordinated relay race, each carriers passing its velocity to the next at each virtual probe. The saturation velocity is thus always ballistic whether or not device length is smaller or larger than the mean free path. The ballistic saturation velocity is always independent of scattering-limited low-field mobility that may be degraded by the gate electric field. After discussing the quantum nature of carriers, the transport mechanism is presented and applied to the modeling of p-type silicon nanowire field effect transistor.